发明名称 3D INTEGRATED MICROELECTRONIC ASSEMBLY WITH STRESS REDUCING INTERCONNECTS AND METHOD OF MAKING SAME
摘要 <p>PURPOSE: A three dimensional integrated microelectronic assembly with a stress reducing wire and a manufacturing method thereof are provided to protect an IC chip inside a handler using a compliant dielectric material. CONSTITUTION: A microelectronic assembly comprises a first microelectronic element and a second microelectronic element. The first microelectronic element comprises a substrate, a first semiconductor device(26), and conductive pads on a first surface. The second microelectronic element comprises a handler(10), a second semiconductor device(66), and the conductive pads on the first surface The first microelectronic element and the second microelectronic element are integrated so that second surfaces face. The conductive elements of the first microelectronic element are connected electrically to the conductive element of the second microelectronic element.</p>
申请公布号 KR20120137255(A) 申请公布日期 2012.12.20
申请号 KR20120060534 申请日期 2012.06.05
申请人 OPTIZ, INC. 发明人 OGANESIAN VAGE
分类号 H01L23/48;H01L23/12 主分类号 H01L23/48
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