发明名称 |
PHASE-LOCKED LOOP LOCK DETECT |
摘要 |
Apparatus and methods for detecting a lock in a phase-locked loop (PLL) are disclosed. In one aspect, a lock detect component includes a reference multiplier and a lock detect. The reference multiplier can receive a reference signal, a divider signal, and a voltage-controlled oscillator (VCO) output generated by a VCO in a PLL from which the divider signal is generated. The reference multiplier can also generate a multiplied reference signal using the reference signal and the VCO output. The multiplied reference signal can have a frequency that is an integer multiple of a frequency of the reference signal. The lock detect can detect a phase lock of the reference signal and the divider signal based at least in part on comparing a signal generated from a delayed reference signal and a signal generated from a delayed divider signal for a predetermined period of time.
|
申请公布号 |
US2012319747(A1) |
申请公布日期 |
2012.12.20 |
申请号 |
US201113164098 |
申请日期 |
2011.06.20 |
申请人 |
NAMDAR-MEHDIABADI ARDESHIR;LEE YONG HEE;OBKIRCHER THOMAS;SKYWORKS SOLUTIONS, INC. |
发明人 |
NAMDAR-MEHDIABADI ARDESHIR;LEE YONG HEE;OBKIRCHER THOMAS |
分类号 |
H03L7/095 |
主分类号 |
H03L7/095 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|