发明名称 Method and Apparatus for Biasing Rail to Rail DMOS Amplifier Output Stage
摘要 An amplifier comprises: an input stage for receiving incoming signals; a high gain stage coupled to the input stage and providing driving signals in response to the incoming signals to an output driver stage; and an output terminal coupled to the output driver stage. The output driver stage comprises a high side driver circuit having a first terminal receiving a first driving signal pdrive from the high gain stage, a second terminal coupled VDD through a first voltage drop, and a third terminal coupled to the output terminal of the amplifier.
申请公布号 US2012319777(A1) 申请公布日期 2012.12.20
申请号 US201113236950 申请日期 2011.09.20
申请人 CAHALANE AIDAN;ANALOG DEVICES, INC. 发明人 CAHALANE AIDAN
分类号 H03F3/45 主分类号 H03F3/45
代理机构 代理人
主权项
地址