发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 In performing a read operation of a memory transistor, a control circuit supplies a first voltage to a selected word line connected to a selected memory transistor. A second voltage is supplied to a non-selected word line connected to a non-selected memory transistor other than the selected memory transistor, the second voltage being higher than the first voltage. A third voltage is supplied to a bit line. A fourth voltage lower than the third voltage is supplied to, among source lines, a selected source line connected to a memory string including the selected memory transistor in a selected memory block. A fifth voltage substantially the same as the third voltage is supplied to, among the source lines, a non-selected source line connected to a non-selected memory string in the selected memory block.
申请公布号 US2012320678(A1) 申请公布日期 2012.12.20
申请号 US201213424724 申请日期 2012.03.20
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MAEJIMA HIROSHI;SAKAGUCHI NATSUKI
分类号 G11C16/28;G11C16/04 主分类号 G11C16/28
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