| 摘要 |
<p>A breakdown detection circuit 200 is described which is arranged to detect abnormally high currents indicative of a defective cell 100, 102, 104 during programming of a memory cell 100 through monitoring the impedance level at a terminal in the breakdown detection circuit. The programming current is limited by means of a current sink the value of which is set by a reference module 202. Excessive current drawn by the programmed device 102 results in a higher than expected voltage at net_bd, which is detected by device M2 on terminal BD. The breakdown detection circuit is connected between the device being programmed 100 and ground 0V and comprises three transistors M1a, M2, M3, at least one of which (for example M3) is capable of withstanding the programming voltage in case of breakdown. Other embodiments describe a flag bit cell design (figure 3), a memory array (figure 4) and methods of reading and writing from/to that array, and circuitry for biasing a memory word-line for both read and write operations (figures 5-7). Another embodiment (figure 7) provides a worddrive circuit capable of being used in read and write operations. The One time programmable (OTP) device may be a differential memoery device comprising two gate connected OTP transistor devices. The OTP device may be programmed using Fowler-Nordheim tunneling and comprise of a thick oxide layer and source drain extensions which are highly doped, shallow with pockets (figure 8). The embodiments may be used separately or in a combination.</p> |
