发明名称 METHOD FOR FORMING DEEP-CHANNEL SUPER-PN JUNCTION
摘要 <p>A method for forming a deep-channel super-PN junction, said method comprising: a deposition step (step 1) of depositing an epitaxial layer (101) on a substrate; a dielectric formation step (step 2) of forming a first dielectric layer (201) and a second dielectric layer (301) on the epitaxial layer (101); a deep channel forming step (step 3) of forming a deep channel (401) on the epitaxial layer (101); a filling step (step 4) of filling in the deep channel (401) with epitaxial material (501) so as fill in the entire deep channel, and exceeding the specified height of the second dielectric layer; an etching step (step 5) of etching the epitaxial material (501), the first dielectric layer (201) and the second dielectric layer (301) by means of an etching gas up to the interface between the first dielectric layer (201) and the epitaxial material (501); and a removal step (step 6) of removing the first dielectric layer (201) and the second dielectric layer (301) so as to achieve planarization of the epitaxial material. Use of the present method enables flattening of silicon by means compatible with existing processes, with the advantages of a simple process, high efficiency, and low process costs, and allows problems of unstable Si device parameters caused by using CMP to be avoided.</p>
申请公布号 WO2012167714(A1) 申请公布日期 2012.12.13
申请号 WO2012CN76347 申请日期 2012.05.31
申请人 CSMC TECHNOLOGIES FAB1 CO., LTD;CSMC TECHNOLOGIES FAB2 CO., LTD;WU, TZONG SHIANN;WANG, GENYI;YUAN, LEIBING;WU, PENGPENG 发明人 WU, TZONG SHIANN;WANG, GENYI;YUAN, LEIBING;WU, PENGPENG
分类号 H01L21/18;H01L21/306;H01L29/78 主分类号 H01L21/18
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