DATA READOUT CIRCUIT OF PHASE CHANGE MEMORY

摘要

A data readout circuit of a phase change memory is provided, which relates to one or more phase change memory cells, wherein each phase change memory cell connects with a control circuit through a bit line and a word line. The data readout circuit includes: a clamping voltage generating circuit for generating clamping voltage; a pre-charge circuit for quickly charging the bit line under the control of the clamping voltage; a clamping current generating circuit for, under the control of the clamping voltage, generating clamping current by which the bit line is maintained in the clamping balance state; a clamping current calculation circuit for performing subtraction and multiplication calculations on the clamping current to increase the difference value between the clamping current on high impedance state and that on low impedance state; a comparison amplifying circuit for comparing the calculated clamping current with reference current and outputting a readout result. Compared with the prior arts, the provided data readout circuit of the phase change memory can efficiently increase data readout speed, decrease the misreading window between high and low impedance, decrease the crosstalk when reading out data, and increase the reliability of the readout data.