| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve a transfer speed performance and reliability for a phase change memory that has a memory array structure in which a plurality of memory bits having a current selector switch and phase change film electrically formed in parallel are electrically arranged in series. <P>SOLUTION: Each current selector switch of a plurality of memory bits which are connected in serial is sequentially switched ON/OFF within the time period of occurrence of a pulse current generated by a pulse current source, and current is flowed through a phase change film of at least one of the plurality of memory bits for a time period shorter than that of occurrence of the pulse current, thereby writing data sequentially to the plurality of memory bits. <P>COPYRIGHT: (C)2013,JPO&INPIT |
