发明名称 3D Integrated Microelectronic Assembly With Stress Reducing Interconnects And Method Of Making Same
摘要 A microelectronic assembly and method of making, which includes a first microelectronic element (including a substrate with first and second opposing surfaces, a semiconductor device, and conductive pads at the first surface which are electrically coupled to the semiconductor device) and a second microelectronic element (including a handier with first and second opposing surfaces, a second semiconductor device, and conductive pads at the handler first surface which are electrically coupled to the second semiconductor device). The first and second microelectronic elements are integrated such that the second surfaces face each other. The first microelectronic element includes conductive elements each extending from one of its conductive pads, through the substrate to the second surface. The second microelectronic element includes conductive elements each extending between the handler first and second surfaces. The conductive elements of the first microelectronics element are electrically coupled to the conductive elements of the second microelectronics element.
申请公布号 US2012313209(A1) 申请公布日期 2012.12.13
申请号 US201113157202 申请日期 2011.06.09
申请人 发明人 OGANESIAN VAGE
分类号 H01L31/0224 主分类号 H01L31/0224
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