LCD output enable signal generating circuits and LCDs comprising the same

摘要

A signal generating circuit for a liquid crystal display (LCD) includes circuitry adapted to receive a gate clock signal and an output enable signal. The gate clock signal is a combination of a gate-on signal and a gate-off signal and the output enable signal is operable to adjust the width of the gate-on signal. The signal generating circuit adjusts the output enable signal such that a falling edge of the output enable signal overlaps a rising edge of the gate clock signal and thereby delays the gate clock signal for a selected amount of time.