发明名称 Low consumption flip-flop circuit with data retention and method thereof
摘要 The present disclosure relates to a low consumption flip-flop circuit with data retention, comprising at least one flip-flop and at least one retention cell connected to the output of the flip-flop and configured so that during normal operation of the flip-flop circuit, the retention cell transmits the data or logic state present on the output terminal of the flip-flop to its own output terminal, while during low consumption operation of the flip-flop circuit a latch circuit of the retention cell suitable to memorize data or a logic state corresponding to the last data or logic state present on the output terminal of the flip-flop is activated.
申请公布号 US8330518(B2) 申请公布日期 2012.12.11
申请号 US201113008588 申请日期 2011.01.18
申请人 VEGGETTI ANDREA MARIO;JAIN ABHISHEK;ROHILLA PANKAJ;STMICROELECTRONICS S.R.L.;STMICROELECTRONICS PVT LTD 发明人 VEGGETTI ANDREA MARIO;JAIN ABHISHEK;ROHILLA PANKAJ
分类号 H03K3/356;H03K3/289 主分类号 H03K3/356
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