发明名称 |
Semiconductor memory device and operation method thereof |
摘要 |
A semiconductor memory device includes a clock synchronizing unit for receiving a first power voltage through a first power voltage terminal, and an additional power voltage providing unit for additionally providing a second power voltage to the first power voltage terminal for a predetermined period after leaving a power down mode. |
申请公布号 |
US8331190(B2) |
申请公布日期 |
2012.12.11 |
申请号 |
US201113172191 |
申请日期 |
2011.06.29 |
申请人 |
YON SUN-HYUCK;PARK KEE-TEOK;HYNIX SEMICONDUCTOR INC. |
发明人 |
YON SUN-HYUCK;PARK KEE-TEOK |
分类号 |
G11C5/14 |
主分类号 |
G11C5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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