发明名称 Reconfigurable memory arrays having programmable impedance elements and corresponding methods
摘要 A memory device may include a plurality of memory cells each having elements with at least one solid ion conductor programmable between at least two different impedance states for at least two different data retention times, the plurality of memory cells being dividable into a plurality of portions, each portion being separately configurable for one of the data retention times.
申请公布号 US8331128(B1) 申请公布日期 2012.12.11
申请号 US20090629531 申请日期 2009.12.02
申请人 DERHACOBIAN NARBEH;HOLLMER SHANE CHARLES;ADESTO TECHNOLOGIES CORPORATION 发明人 DERHACOBIAN NARBEH;HOLLMER SHANE CHARLES
分类号 G11C11/00;G11C17/00 主分类号 G11C11/00
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