发明名称 ASSOCIATIVE MEMORY AND NETWORK ADDRESS RETRIEVAL DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide an associative memory capable of reducing power consumption when executing a retrieval operation because a layout area of a constituting circuit is small in the associative memory in which a retrieval operation is made a pipeline, and a network address retrieval device. <P>SOLUTION: In the associative memory of this invention, a CAM array 10 having a plurality of CAM cells CC is divided into a plurality of CAM subarrays 10a to d, and a retrieval operation is sequentially executed from a higher-order CAM subarray to a lower-order subarray. The CAM subarrays 10a to d include the plurality of CAM cells CC connected to a match line ML, a match line control part 11 for controlling the match line ML in a precharge state or a discharge state, a half-latch circuit 12 for transferring a result obtained by executing the retrieval operation to the lower-order CAM subarray, and a full latch circuit for transmitting a result obtained by the executing the retrieval operation to a priority encoder 70 in the lowest-order CAM subarray 10d. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012243350(A) 申请公布日期 2012.12.10
申请号 JP20110112300 申请日期 2011.05.19
申请人 RENESAS ELECTRONICS CORP 发明人 OGA SHUJI;ABE HIDEAKI
分类号 G11C15/04 主分类号 G11C15/04
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