| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide the wiring design verification method for a semiconductor integrated circuit capable of shortening a time required for verification. <P>SOLUTION: The wiring design verification method includes: extracting the maximum allowable current value Imax, current density J, and wiring film thickness h of each wiring part input by a user to a circuit diagram (S8) on the basis of design specifications (S7); searching the minimum wiring width information Wmin(S12) of each wiring part on the basis of those results; and creating a wiring path netlist (S4) to which the information of the wiring path corresponding to each wiring part is attached and a wiring width netlist (S6) to which wiring width information is attached about each wiring part from layout data (S1); comparing each wiring path in the wiring path netlist to which the minimum wiring width information Wmin of each wiring part is attached with the wiring width information of the corresponding wiring part in the wiring width netlist to verify whether or not currents running through each wiring part are equal to or less than an allowable current value (S13). <P>COPYRIGHT: (C)2013,JPO&INPIT |
