发明名称 GLITCH PROCESSING CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To sufficiently extend the pulse width of a glitch to prevent a through current from occurring in circuits at following stages. <P>SOLUTION: A glitch processing circuit comprises: a single-phase/differential conversion circuit 10 which generates a differential signal in nodes N1 and N2 from a single-phase input signal; a masking circuit 30 which masks a signal of the node N1 with a signal of a node N3 before being output to a node 4 and masks a signal of the node N2 with a signal of a node N5 before being output to a node 6; a latch circuit 30 which accepts signals of the nodes N4 and N6 as its input and sends its output signals to nodes N7 and N8; and a delay circuit 40 which delays a signal of the node N7 by only a time T0 before being output to the node N5 and delays a signal of the node N8 by only a time T0 before being output to the node N3. The signal of the node N8 is made the output signal of the glitch processing circuit. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012244389(A) 申请公布日期 2012.12.10
申请号 JP20110112273 申请日期 2011.05.19
申请人 NEW JAPAN RADIO CO LTD 发明人 SAKAMOTO ITARU;OKANO JUNICHI;KONO TOMOYUKI
分类号 H03K5/1252 主分类号 H03K5/1252
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