发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND DATA EVACUATING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of evacuating data through a route with secured normality. <P>SOLUTION: A semiconductor integrated circuit relating to the invention comprises: a CPU core 12; a normal memory 14 for holding an arithmetic result of the CPU core 12 and first sample data; a sample data storage memory 24 for holding second sample data identical to the first sample data; and a data comparison and determination unit 26 for comparing the first sample data output from the normal memory 14 with the second sample data output from the sample data storage memory 24 through a route not overlapping with the route through which the first sample data is output. When the first sample data matches the second sample data, the CPU core 12 evacuates the arithmetic result from the normal memory 14 through the same route as the route through which the first sample data is output to the data comparison and determination unit 26. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012243205(A) 申请公布日期 2012.12.10
申请号 JP20110114833 申请日期 2011.05.23
申请人 RENESAS ELECTRONICS CORP 发明人 TAKAHASHI DAIGO;ITO KENICHI;ENDO MAKOTO
分类号 G06F11/14;G06F11/22 主分类号 G06F11/14
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