| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device with layered chip structure, capable of preventing generation of malfunction and reliability degradation caused by conduction of heat generated at a semiconductor chip to any other semiconductor chips, without causing an increase in manufacturing cost or chip size. <P>SOLUTION: Current amount or heat quantity, or an operational temperature range during operation in a circuit region 17 of a semiconductor chip 12 is smaller than a circuit region of a semiconductor chip 11. The semiconductor chip 11 and the semiconductor chip 12 are layered so that at least the circuit region of the semiconductor chip 11 and the circuit region 17 of the semiconductor chip 12 are not overlapped with each other in plan view. <P>COPYRIGHT: (C)2013,JPO&INPIT |
