Double port RAM for use in integrated circuit, has memory cell associated with four bit lines, and connection units connecting first line with second line and third line with fourth line, respectively during reading and writing in cell

摘要

The RAM has an elementary memory cell associated with four bit lines (BLFa, BLFb, BLTa, BLTb) and two word lines (WLa, WLb). Connection units connect the first line with the second line and the third line with the fourth line, respectively during reading and writing in the memory cell. The connection unit comprises a metal oxide semiconductor (MOS) transistor (34) placed between the third and fourth lines, and a second MOS transistor (36) placed between the first and second lines. Gates of the transistors are connected to simultaneous read/write signal generating unit (40). An independent claim is also included for a method for performing a step of simultaneously writing and reading in an elementary memory cell of a dual port RAM.