发明名称 CLOCK HANDOFF CIRCUIT AND CLOCK HANDOFF METHOD
摘要 <P>PROBLEM TO BE SOLVED: To perform clock handoff more stably. <P>SOLUTION: A dual port RAM is capable of performing writing and reading independently of each other. A write address control section controls write addresses of the dual port RAM in which the input data is written. A blank address detecting section detects blank addresses among the write addresses in which the input data is not written. A read address conversion section converts the write addresses of the dual port RAM excluding the blank address into read addresses from which the output data are read out. This technology is applicable, e.g., to a data transmission system. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012238992(A) 申请公布日期 2012.12.06
申请号 JP20110105992 申请日期 2011.05.11
申请人 SONY CORP 发明人 KOSUGE SHOJI
分类号 H04L7/00;G06F1/12;G06F13/38;G06F13/42 主分类号 H04L7/00
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