发明名称 VERTICAL GATE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
摘要 <P>PROBLEM TO BE SOLVED: To provide a vertical gate semiconductor device which can stably form a source region and a body contact region even in the case of narrow gate electrode spacing, and a manufacturing method of the same. <P>SOLUTION: A manufacturing method comprises: forming a first insulating film 4 having openings in a trench groove formation region on a substrate surface; forming trench grooves 6 penetrating a first body region 3 to reach a drain region 2 by etching using the first insulating film 4 as a mask; widening the openings of the first insulating film 4 by isotropic etching after providing gate electrodes 10 in the trench grooves 6 to expose the substrate surface on the both sides of each of the trench grooves 6; forming source regions 11 in a self-alignment manner by impurity introduction using the etched first insulating film 4 as a mask; subsequently, forming a buried insulating film in the trench grooves 6 on the gate electrodes 10 and exposing the substrate surface; and forming a second body region 14 in a self-align manner by introducing impurities from the exposed substrate surface. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012238773(A) 申请公布日期 2012.12.06
申请号 JP20110107747 申请日期 2011.05.13
申请人 PANASONIC CORP 发明人 TOMITA KOICHI;KAMIHISA KATSUYOSHI;HAMADA MITSUHIRO;MIZOGUCHI SHUJI
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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