| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a CRC arithmetic circuit that performs CRC arithmetic in fewer processing stages. <P>SOLUTION: The CRC arithmetic circuit comprises: a first exclusive OR circuit (1403) for performing an exclusive OR operation of the most significant bit of data of third data, and fourth data; a plurality of first AND circuits (1401) for performing AND operations of the most significant bit of data of the third data, and first data; a plurality of second exclusive OR circuits (1402) for performing exclusive OR operations of output data from the plurality of first AND circuits and the data of the third data other than the most significant bit; a plurality of second AND circuits (1404) for performing AND operations of output data from the first exclusive OR circuit and second data; and a plurality of OR circuits (1405) for performing OR operations of output data from part of the plurality of second exclusive OR circuits and output data from part of the plurality of second AND circuits. <P>COPYRIGHT: (C)2013,JPO&INPIT |
