| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a multi-valued ROM of high degree integration in which the impact of manufacturing variation is low and the manufacturing yield is high. <P>SOLUTION: The multi-valued ROM includes a ROM cell transistor Tr, a plurality of bit lines BT1-BT3, and first metal lines 31-44. The ROM cell transistor Tr is provided in a region on the surface of a substrate. The plurality of bit lines BT1-BT3 are provided above the surface of a substrate to extend in the Y direction, and are arranged side by side in the Z direction. The first metal lines 31-44 are connected with one of the source-drain 22 of the ROM cell transistor Tr, and extended to the vicinity of each of the plurality of bit lines BT1-BT3. The first metal lines 31-44 are connected with any one of the plurality of bit lines BT1-BT3, or not connected with any of them. <P>COPYRIGHT: (C)2013,JPO&INPIT |
