发明名称 MEMORY CONTROLLER AND CONTROL METHOD
摘要 A memory controller includes: a first write circuit configured to write a first dummy pattern including a plurality of consecutive first dummy values at a first address of a memory; a second write circuit configured to write a first pattern including a plurality of types of consecutive values at a second address of the memory after a write operation of the first dummy pattern by the first write circuit; a third write circuit configured to write a second dummy pattern including a plurality of consecutive second dummy values at a third address of the memory after a write operation of the first pattern by the second write circuit; a read circuit configured to read the written first pattern based on the second address of the memory; and a timing adjustment circuit configured to adjust a timing at which data is written into the memory based on a read first pattern.
申请公布号 US2012307575(A1) 申请公布日期 2012.12.06
申请号 US201213454200 申请日期 2012.04.24
申请人 AISO SHINYA;FUJITSU LIMITED 发明人 AISO SHINYA
分类号 G11C7/22 主分类号 G11C7/22
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