| 摘要 |
<p>The present invention relates to the field of communications. Provided in embodiments of the present invention is a method for reducing the power consumption of a chip. The method comprises: receiving within a first unit time a configuration parameter of a logic module that the chip needs to process within a second unit time, the configuration parameter comprising at least the count of data blocks comprised in the logic module and the length of the data blocks, while the second unit time is the unit time subsequent to the first unit time; determining, on the basis of the configuration parameter of the logic module corresponding to a processor unit comprised by the chip, a voltage required within the second unit time by the processor unit; supplying within the second unit time the voltage required by the processor unit to the processor unit. A device comprising: a receiver module, a determination module, and a supply module. The present invention prevents power consumption wastage and performance loss for the chip.</p> |
