发明名称 Weak bit compensation for static random access memory
摘要 A static random access memory (SRAM) includes a data line, a data line bar, and a current path block. The current path block includes at least two transistors configured to provide a current path for the data line in transition from a first logic voltage to a second logic voltage, wherein the current path block is connected to the data line and the data line bar.
申请公布号 US8325510(B2) 申请公布日期 2012.12.04
申请号 US20100704710 申请日期 2010.02.12
申请人 LEE CHENG HUNG;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LEE CHENG HUNG
分类号 G11C11/00;G11C7/00;G11C8/00 主分类号 G11C11/00
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