发明名称 Bias circuit and wireless communication device including the bias circuit
摘要 A bias circuit according to the present invention includes: a transistor for supplying a bias current from the emitter of the transistor; an emitter potential generating device for supplying a potential to the emitter of the transistor; a switch element; and a voltage supply circuit for supplying a base voltage to the base of the transistor in response to the on/off of the switch element, wherein the emitter potential generating device generates a potential causing a potential difference between the base and emitter of the transistor to fall below a saturation voltage at the junction of the transistor, even in the case where the base of the transistor is fed with a voltage not lower the saturation voltage at the junction of the transistor.
申请公布号 US8324959(B2) 申请公布日期 2012.12.04
申请号 US201113106571 申请日期 2011.05.12
申请人 MASUMOTO YASUYUKI;PANASONIC CORPORATION 发明人 MASUMOTO YASUYUKI
分类号 G05F1/10 主分类号 G05F1/10
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