发明名称 Data check circuit for checking program data stored in memory
摘要 A data check circuit comprising: a request signal output circuit configured to output a request signal for requesting occupation of a bus to an arbitration circuit configured to arbitrate the occupation of the bus, when a CPU connected, as a bus master, with the bus for accessing a memory outputs an instruction signal for providing an instruction for starting detection of whether or not data stored in the memory is correct; a data acquisition circuit configured to acquire data stored in the memory through the bus, when the arbitration circuit outputs a permission signal for permitting the occupation of the bus based on the request signal; and a data processing circuit configured to perform processing for detecting whether or not the acquired data is correct, the acquired data acquired by the data acquisition circuit.
申请公布号 US8327054(B2) 申请公布日期 2012.12.04
申请号 US20100792656 申请日期 2010.06.02
申请人 OGINO NAOYUKI;SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC;SANYO SEMICONDUCTOR CO., LTD. 发明人 OGINO NAOYUKI
分类号 G06F13/362 主分类号 G06F13/362
代理机构 代理人
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