发明名称 Level shifter design
摘要 A level shifter receives an input voltage signal and produces an output voltage signal. The level shifter includes a first inverter, configured to operate at a potential difference between a first voltage V1 and a second voltage V2. The output from the invert is capacitively coupled to an input of a latch circuit via a capacitor. The capacitor has a first terminal connected to the output terminal of the first inverter, and further has a second terminal. The level shifter has a resistor connected to a third voltage V3 and to the capacitor for tying the input to the latch circuit to a desired voltage. The latch circuit is configured to operate at a potential difference between a fourth voltage V4 and a fifth voltage V5. The latch has an input node connected to the resistor and the capacitor, and further has an output node connected to an output node of the level shifter.
申请公布号 US8324955(B2) 申请公布日期 2012.12.04
申请号 US201113051343 申请日期 2011.03.18
申请人 ROTH ALAN;HSU YING-CHIH;SHI JUSTIN;SOENEN ERIC;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 ROTH ALAN;HSU YING-CHIH;SHI JUSTIN;SOENEN ERIC
分类号 H03L5/00 主分类号 H03L5/00
代理机构 代理人
主权项
地址