发明名称 Integrated DMA processor and PCI express switch for a hardware-based functional verification system
摘要 A method and system for facilitating communication between a host system and one or more hardware-based functional verification systems. The one or more hardware-based functional verification systems verify the functionality of electronic circuit designs. A controller switch comprises a host interface connecting to a host system, and a plurality of device ports. Each device port connects to a hardware emulator. The controller switch further comprises a plurality of direct memory access (DMA) engines and a plurality of execution units. An execution unit comprises an instruction cache and memory storing at least one DMA instruction and at least one address for performing a software instruction and a plurality of execution unit registers.
申请公布号 US8327039(B2) 申请公布日期 2012.12.04
申请号 US20090541864 申请日期 2009.08.14
申请人 CHOU CHING-PING;HWANG SU-JEN;YU TENG-I;CADENCE DESIGN SYSTEMS, INC. 发明人 CHOU CHING-PING;HWANG SU-JEN;YU TENG-I
分类号 G06F13/28;G06F3/00;G06F5/00 主分类号 G06F13/28
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