发明名称 System, method, and apparatus for a scalable processor architecture for a variety of string processing applications
摘要 Systems, methods, and apparatus for a scalable processor architecture for variety of string processing application are described. In one such apparatus, n input first in, first out (FIFO) buffer stores an input stream. A plurality of memory banks store data from the input stream. A re-configurable controller processes the input stream. And an output FIFO buffer stores the processed input stream.
申请公布号 US8325069(B2) 申请公布日期 2012.12.04
申请号 US20090645392 申请日期 2009.12.22
申请人 GOPAL VINODH;WOLRICH GILBERT M.;CLARK CHRISTOPHER F.;FEGHALI WADJI K.;INTEL CORPORATION 发明人 GOPAL VINODH;WOLRICH GILBERT M.;CLARK CHRISTOPHER F.;FEGHALI WADJI K.
分类号 H03M7/34;H03M7/38 主分类号 H03M7/34
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