摘要 |
<p>Harmonic processing circuits (3a, 3b), which improve the efficiency of a transistor (1), are constituted by connecting, in parallel, distributed lines (4a, 4b) with electrical lengths of less than 90° at the second harmonic frequency (2fo) of the operating frequency of the transistor (1), and a capacitive coupling line that is interdigitally intersected by open-circuited stubs (5a, 5b) with electrical lengths of less than 90° at the second harmonic frequency (2fo).</p> |
申请人 |
MITSUBISHI ELECTRIC CORPORATION;UCHIDA, HIROMITSU;YAMAUCHI, KAZUHISA;NAKAYAMA, MASATOSHI;NAKAHARA, KAZUHIKO;OGURA, SATOSHI |
发明人 |
UCHIDA, HIROMITSU;YAMAUCHI, KAZUHISA;NAKAYAMA, MASATOSHI;NAKAHARA, KAZUHIKO;OGURA, SATOSHI |