发明名称 CLOCK DOMAIN CHECK METHOD, CLOCK DOMAIN CHECK PROGRAM, AND RECORDING MEDIUM
摘要 To reduce pseudo errors. A stationary signal is propagated through the circuit to be checked. A combination is extracted in which different asynchronous transfers occur between a transmitting side register and a receiving side register. From the extracted combination of asynchronous transfers, a circuit to be checked is extracted, and a synchronization circuit of a plurality of signals is excluded from the circuit to be checked. A stationary signal is propagated through the circuit to be checked, for each combination among all combinations of logic values 1 and 0 of the stationary signal. It is checked whether or not there exists one asynchronous transmitting side register to which signal change can logically reach, in the combination of logic values of the stationary signal propagated. Based on the result, it is determined whether or not the circuit is appropriate as a synchronization circuit for a single-signal transfer, thereby reducing pseudo errors.
申请公布号 US2012304033(A1) 申请公布日期 2012.11.29
申请号 US201213567043 申请日期 2012.08.04
申请人 SUZUKI KEIICHI;ABE SUSUME;RENESAS ELECTRONICS CORPORATION 发明人 SUZUKI KEIICHI;ABE SUSUME
分类号 G01R31/3177 主分类号 G01R31/3177
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