发明名称 Method and Apparatus of Performing An Erase Operation On A Memory Integrated Circuit
摘要 Various discussed approaches improve the over erase issue and the coupling effect, and include (A) multilevel contacts between (i) the first outer selected word line of an erase group, and (ii) the first unselected word line outside the ease group neighboring the first outer selected word line; (B) a sufficient separation distance between (i) the first outer selected word line of an erase group, and (ii) the first unselected word line outside the ease group neighboring the first outer selected word line. These are examples of electrically isolating (i) the first outer selected word line of an erase group, from (ii) the first unselected word line outside the ease group neighboring the first outer selected word line.
申请公布号 US2012300553(A1) 申请公布日期 2012.11.29
申请号 US201213567817 申请日期 2012.08.06
申请人 CHANG YI-FAN;LO SU-CHUEH;YIH CHENG MING;CHU TA KANG;WU CHU CHING;LIAO KUO YU;CHEN KEN HUI;CHANG KUEN-LONG;HUNG CHUN-HSIUNG;MACRONIX INTERNATIONAL CO., LTD. 发明人 CHANG YI-FAN;LO SU-CHUEH;YIH CHENG MING;CHU TA KANG;WU CHU CHING;LIAO KUO YU;CHEN KEN HUI;CHANG KUEN-LONG;HUNG CHUN-HSIUNG
分类号 G11C16/04 主分类号 G11C16/04
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