发明名称 METHOD FOR PREDICTING WIRING BREAKDOWN AREA DUE TO CURRENT IN SEMICONDUCTOR APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To shorten analysis time in a method for predicting a wiring breakdown area due to a current of a semiconductor apparatus. <P>SOLUTION: An analysis model obtained by modeling lower layer wirings 14A and 14B respectively with one series resistance, a first lower layer via 15A and a second lower layer via 15B with one resistance, a first upper layer via 17A and a second upper layer via 17B with one resistance, first and second upper layer wirings 16A and 16B with a resistance bridge circuit and a power transistor TR with series resistance is generated by a calculator for modeling. A current is supplied to the power transistor TR in the analysis model by a circuit simulator 3, current density of each resistance in the first and second lower layer wirings 14A and 14B and the first and second upper layer wirings 16A and 16B is calculated on the basis of the current flowing in each resistance in the analysis model and the current density of each resistance and a current density threshold causing the wiring breakdown are compared by a comparator 4 to predict the wiring breakdown area. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012234918(A) 申请公布日期 2012.11.29
申请号 JP20110101431 申请日期 2011.04.28
申请人 SEMICONDUCTOR COMPONENTS INDUSTRIES LLC 发明人 OTANI KAZUYUKI
分类号 H01L21/82;G06F17/50;H01L21/3205;H01L21/768;H01L21/822;H01L23/522;H01L27/04 主分类号 H01L21/82
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