| 摘要 |
<P>PROBLEM TO BE SOLVED: To further shorten an access time of a reading operation in most cases. <P>SOLUTION: The semiconductor storage device includes: a memory cell (which is arranged in cell array 10) that is connected to at least word lines of first and second ports and at least bit lines of the first and second ports, and in which a reading operation is performed synchronously with a clock signal; an address coincidence detection circuit 17 that compares row addresses of the first and second ports with each other, and detects coincidence of the row addresses; and a timing generation circuit 16a for generating a clock signal having a timing that has been adjusted according to a detection result of the address coincidence detection circuit 17. <P>COPYRIGHT: (C)2013,JPO&INPIT |
