发明名称 IMPLEMENTING STORAGE ADAPTER PERFORMANCE OPTIMIZATION WITH ENHANCED HARDWARE AND SOFTWARE INTERFACE
摘要 A method and controller for implementing storage adapter performance optimization with chained hardware operations and an enhanced hardware (HW) and firmware (FW) interface minimizing hardware and firmware interactions, and a design structure on which the subject controller circuit resides are provided. The controller includes a plurality of hardware engines; and a processor. A data store is configured to store a plurality of control blocks. A global work queue includes a plurality of the control blocks selectively arranged in a predefined chain to define sequences of hardware operations. The global work queue includes a queue input coupled to the processor and the hardware engines and an output coupled to the hardware engines. The control blocks are arranged in respective engine work queues designed to control hardware operations of the respective hardware engines and respective control blocks are arranged in an event queue to provide completion results to the processor.
申请公布号 US2012303909(A1) 申请公布日期 2012.11.29
申请号 US201113114390 申请日期 2011.05.24
申请人 BAKKE BRIAN E.;BOWLES BRIAN L.;CARNEVALE MICHAEL J.;GALBRAITH ROBERT E.;GERHARD ADRIAN C.;IYER MURALI N.;MOERTL DANIEL F.;MORAN MARK J.;RADHAKRISHNAN GOWRISANKAR;WECKWERTH RICK A.;ZIEBARTH DONALD J.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BAKKE BRIAN E.;BOWLES BRIAN L.;CARNEVALE MICHAEL J.;GALBRAITH ROBERT E.;GERHARD ADRIAN C.;IYER MURALI N.;MOERTL DANIEL F.;MORAN MARK J.;RADHAKRISHNAN GOWRISANKAR;WECKWERTH RICK A.;ZIEBARTH DONALD J.
分类号 G06F12/00 主分类号 G06F12/00
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