发明名称 Solder collapse free bumping process of semiconductor device
摘要 PURPOSE: A method for forming a bump of a semiconductor device is provided to reduce a pitch of a bump by forming the bump consisting of a copper pillar and a solder layer. CONSTITUTION: A first electroplating process is performed on a region exposed by photoresist to form a pillar(S110). A second electroplating process is performed on the pillar to form a solder layer(S112). A photoresist pattern is removed(S114). A reflow process is performed on a semiconductor substrate to form a solder bump(S118). A seed layer which is formed on the region except the solder bump is removed(S120). [Reference numerals] (AA) Start; (BB) End; (S100) Preparing a substrate with a passivation layer; (S102) Forming a buffer insulating layer for exposing a pad; (S104) Forming a barrier layer for covering a whole semiconductor substrate; (S106) Forming a seed layer on a diffusion prevention layer; (S108) Forming a photoresist pattern for exposing the seed layer on a pad region; (S110) Forming a pillar on the seed layer by a first electroplating process; (S112) Forming a solder on the pillar by a second electroplating process; (S114) Removing the photoresist pattern; (S116) Removing an oxygen compound on the semiconductor substrate surface-heat treating in a formic acid atmosphere in a chamber-cleaning with DI water; (S118) Forming a solder bump by reflow of the solder; (S120) Removing the diffusion prevention layer/seed layer on the semiconductor substrate surface by wet etching
申请公布号 KR20120128967(A) 申请公布日期 2012.11.28
申请号 KR20110046940 申请日期 2011.05.18
申请人 发明人
分类号 H01L21/60 主分类号 H01L21/60
代理机构 代理人
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