发明名称 Operating method of semicodnuctor device
摘要 PURPOSE: A semiconductor device and an operating method thereof are provided to reduce operation time by continuously verifying memory cells with various levels in a verification operation of a multi level cell. CONSTITUTION: Bit lines corresponding to selected memory cells are precharged. A first verification voltage is applied to a word line(Sel. WL) connected to the selected memory cells. The potential of the bit lines in which the states of the selected memory cells is reflected for the first time(EV1) is sensed. A first target voltage(PV1) higher than a first verification voltage is applied to the word line. The states of the selected memory cells are reflected in the bit lines for the second time(EV2) which is shorter than the first time. [Reference numerals] (AA,BB) Level rise; (CC) Precharge; (DD,FF,II,KK,NN) Evaluation; (EE,GG,JJ,LL,OO) Sensing; (HH,MM) Level rise
申请公布号 KR20120127930(A) 申请公布日期 2012.11.26
申请号 KR20110045721 申请日期 2011.05.16
申请人 发明人
分类号 G11C16/34;G11C16/06 主分类号 G11C16/34
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