| 摘要 |
PURPOSE: A duty correcting circuit is provided to reduce duty correction time by correcting a duty in a large range per unit duty correction operation in a low frequency domain. CONSTITUTION: A clock buffer buffers an input clock and generates a buffer clock. A swing level converter(200) generates a sink voltage and an internal clock transited to a power voltage level. A duty control unit(300) generates duty information and frequency information by using a high pulse width and a low pulse width of an internal clock. A current control unit(400) controls a logic value transition point of a buffer clock in response to the duty information and frequency information. [Reference numerals] (200) Swing level converter; (300) Duty control unit
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