发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
To reduce power consumption of a memory device. To reduce the area of a memory device. To reduce the number of transistors included in a memory device. The memory device includes a comparator comparing a first output signal with a second output signal, a first memory portion including a first oxide semiconductor transistor and a first silicon transistor, a second memory portion including a second oxide semiconductor transistor and a second silicon transistor, and an output potential determiner determining a potential of the first output signal and a potential of the second output signal. One of a source and a drain of the first oxide semiconductor transistor is electrically connected to a gate of the first silicon transistor. One of a source and a drain of the second oxide semiconductor transistor is electrically connected to a gate of the second silicon transistor.
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申请公布号 |
US2012292680(A1) |
申请公布日期 |
2012.11.22 |
申请号 |
US201213472708 |
申请日期 |
2012.05.16 |
申请人 |
NAGATSUKA SHUHEI;YAKUBO YUTO;SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
NAGATSUKA SHUHEI;YAKUBO YUTO |
分类号 |
H01L27/06 |
主分类号 |
H01L27/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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