摘要 |
<p>A booster circuit (40) constituted such that, when a read request is issued to read data from a flash memory, when a voltage (Vmid) detected on an output terminal (Vout1) by a voltage detection circuit (72) is equal to or less than a voltage (V1), an oscillator (80a) outputs a controlling clock signal (CLK) having a predetermined on time and off time to a transistor (N12) of a boost converter (42) and controls switching of the transistor (N12); and when the voltage detection circuit (72) has detected that the voltage (Vmid) on the output terminal (Vout1) has reached a voltage (Vm), an oscillator (80b) outputs to a transistor (N22) of a boost converter (44) a controlling clock signal (CLK) having an on time (Ton) and an off time (Toff) that are input from a selection circuit (78a), and controls switching of the transistor (N22).</p> |
申请人 |
THE UNIVERSITY OF TOKYO;TAKEUCHI, KEN;HATANAKA, TERUYOSHI;ISHIDA, KOICHI;YASUFUKU, TADASHI;TAKAMIYA, MAKOTO;SAKURAI, TAKAYASU |
发明人 |
TAKEUCHI, KEN;HATANAKA, TERUYOSHI;ISHIDA, KOICHI;YASUFUKU, TADASHI;TAKAMIYA, MAKOTO;SAKURAI, TAKAYASU |