METHOD FOR DEBUGGING LOONGSON CPU AND SOUTH/NORTH BRIDGE CHIPS AND DEVICE THEREOF

摘要

The present invention provides a method for debugging loongson CPU and south/north bridge chips and device thereof. Said device includes HT bus interface and corresponding switches and it connects to the loongson CPU and south/north bridge chips via the HT bus interface. Said method includes: choosing the north/south bridge chips which support HT bus; introducing pins of the loongson CPU and north/south bridge chips into the debugging device; debugging whether bugs exist in the pins of the loongson CPU; connecting to corresponding pins and debugging. In accordance with present invention, if the HT bus of the loongson CPU does not satisfy standard protocols, signals with bugs can be located to guide the improvement of the loongson CPU. A plurality types of chipsets can be connected to the loongson CPU by programming a plurality of HT bus interfaces with FPGA, which implements debugging multiple chipsets on a motherboard simultaneously. When the loongson CPU needs debugging with a chipset, the connections to other chipsets can be cut off, saving time and costs by flexible switching.