发明名称 FAST TRANSLATION INDICATOR TO REDUCE SECONDARY ADDRESS TABLE CHECKS IN A MEMORY DEVICE
摘要 A system and method for reducing the need to check both a secondary address table and a primary address table for logical to physical translation tasks is disclosed. The method may include generating a fast translation indicator, such as a logical group bitmap, indicating whether there is an entry in the secondary address table that contains desired information pertaining to a particular logical address. Upon a host request relating to the particular logical address, the storage device may check the bitmap to determine if retrieval and parsing of the secondary table is necessary. The system may include a storage device having RAM cache storage, flash storage and a controller configured to generate and maintain at least one fast translation indicator to reduce the need to check both secondary and primary address tables during logical to physical address translation operations of the storage device.
申请公布号 US2012297118(A1) 申请公布日期 2012.11.22
申请号 US201213464426 申请日期 2012.05.04
申请人 GOROBETS SERGEY ANATOLIEVICH;WU WILLIAM;SPROUSE STEVEN T. 发明人 GOROBETS SERGEY ANATOLIEVICH;WU WILLIAM;SPROUSE STEVEN T.
分类号 G06F12/02 主分类号 G06F12/02
代理机构 代理人
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