| 摘要 |
<P>PROBLEM TO BE SOLVED: To reset an SoC IC (System on a Chip Integrated Circuit) using a plurality of supply voltages as driving voltages in a sequence of a plurality of supply voltage supplies and a reset cancellation timing independently of load variations and noise. <P>SOLUTION: A reset circuit includes: a transistor Tr1 interposed between a supply line L1 and a reset terminal 16 with an emitter directed to the supply line L1 and a collector directed to the reset terminal 16; a transistor Tr2 interposed between a base of the transistor Tr1 and a ground with a collector directed to the base of the transistor Tr1 and an emitter directed to the ground; and a transistor Tr3 interposed between the collector of the transistor Tr1 and the ground with a collector directed to the collector of the transistor Tr2 and an emitter directed to the ground. <P>COPYRIGHT: (C)2013,JPO&INPIT |
