发明名称 METHOD FOR SELF-ALIGNED METAL GATE CMOS
摘要 A semiconductor device is formed by first providing a dual gate semiconductor device structure having FET pair precursors, which includes an nFET precursor and a pFET precursor, wherein each of the nFET precursor and the pFET precursor includes a dummy gate structure. At least one protective layer is deposited across the FET pair precursors, leaving the dummy gate structures exposed. The dummy gate structure is removed from one of the nFET precursor and the pFET precursor to create therein one of an nFET gate hole and a pFET gate hole, respectively. A fill is deposited into the formed one of the nFET gate hole and the pFET gate.
申请公布号 US2012292710(A1) 申请公布日期 2012.11.22
申请号 US201113108138 申请日期 2011.05.16
申请人 CHENG KANGGUO;DORIS BRUCE B.;ZHANG YING 发明人 CHENG KANGGUO;DORIS BRUCE B.;ZHANG YING
分类号 H01L27/092;H01L21/3205 主分类号 H01L27/092
代理机构 代理人
主权项
地址