发明名称 Clock extraction circuit for use in a linearly expandable broadcast router
摘要 A method is described for extracting selected time information from a stream of serialized AES digital audio data. A first transition indicative of a first preamble of said stream of serialized AES digital audio data is detected and, upon detection of the transition, a time count initiated. A second transition indicative of a subsequent preamble of said serialized AES digital audio data is subsequently detected and the time count halted. The time separating the first and second transitions is then determined. The separation time, which preferably is determined in the form of a fast clock pulse count, is then transferred to a decoding logic circuit for use in decoding the stream of serialized AES digital audio data.
申请公布号 US8315348(B2) 申请公布日期 2012.11.20
申请号 US20030518569 申请日期 2003.06.20
申请人 CHRISTENSEN CARL L.;ARBUCKLE LYNN HOWARD;GVBB HOLDINGS S.A.R.L. 发明人 CHRISTENSEN CARL L.;ARBUCKLE LYNN HOWARD
分类号 G11B20/14;H04L7/02;H04B14/04;H04H60/04;H04L7/00;H04L7/033;H04L7/04;H04L7/08 主分类号 G11B20/14
代理机构 代理人
主权项
地址