发明名称 Non-volatile latch circuit and logic circuit, and semiconductor device using the same
摘要 A novel non-volatile latch circuit and a semiconductor device using the non-volatile latch circuit are provided. The latch circuit has a loop structure in which an output of a first element is electrically connected to an input of a second element and an output of the second element is electrically connected to an input of the first element through a second transistor. A transistor using an oxide semiconductor as a semiconductor material of a channel formation region is used as a switching element, and a capacitor is provided to be electrically connected to a source electrode or a drain electrode of the transistor, whereby data of the latch circuit can be retained, and a non-volatile latch circuit can thus be formed.
申请公布号 US8314637(B2) 申请公布日期 2012.11.20
申请号 US20100966513 申请日期 2010.12.13
申请人 KATO KIYOSHI;KOYAMA JUN;SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 KATO KIYOSHI;KOYAMA JUN
分类号 H01L25/00;H03K19/00 主分类号 H01L25/00
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