发明名称 |
Optimizing segment access in binary translation |
摘要 |
A mechanism for a binary translator to emit code that will pre-generate information about a memory segment when a segment selector is assigned to a segment register. The binary translator emits code that will be executed when a memory access using that segment register is encountered and the emitted code will access the pre-generated information when evaluating the memory access request. Memory accesses, where a number of bytes being accessed is less than or equal to a predetermined value, are validated with a number of steps in the code emitted by the binary translator. |
申请公布号 |
US8316193(B2) |
申请公布日期 |
2012.11.20 |
申请号 |
US20090629682 |
申请日期 |
2009.12.02 |
申请人 |
KNIPPEL ROSS CHARLES;SHELDON JEFFREY W.;AGESEN OLE;VMWARE, INC. |
发明人 |
KNIPPEL ROSS CHARLES;SHELDON JEFFREY W.;AGESEN OLE |
分类号 |
G06F12/00 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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