OSCILLATOR ARCHITECTURE HAVING FAST RESPONSE TIME WITH LOW CURRENT CONSUMPTION AND METHOD FOR OPERATING THE OSCILLATOR ARCHITECTURE

摘要

An oscillator architecture and a method for powering up/down the oscillator architecture are described. In one embodiment, an oscillator architecture includes a reference generator configured to generate reference signals and an in-phase/quadrature (IQ) oscillator configured to generate oscillation signals based on the reference signals. The reference generator includes a distributed start-up circuitry that includes multiple start-up circuits. The IQ oscillator includes at least one turbo comparator having a low power functional mode and a turbo functional mode. Other embodiments are also described.